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RSIM provides many configuration parameters to allow the user to simulate a
variety of shared-memory multiprocessor and uniprocessor architectures.
Key features supported by RSIM are:
Processor features:
-  Multiple instruction issue
 -  Out-of-order (dynamic) scheduling
 -  Register renaming
 -  Static and dynamic branch prediction support
 -  Non-blocking loads and stores
 -  Speculative load execution before address disambiguation of previous stores
 -  Simple and optimized memory consistency implementations
 
Memory hierarchy features:
-  Two-level cache hierarchy
 -  Multiported and pipelined L1 cache, pipelined L2 cache
 -  Multiple outstanding cache requests
 -  Memory interleaving
 -  Software-controlled non-binding prefetching
 
Multiprocessor system features:
-  CC-NUMA shared-memory system with directory-based
cache-coherence protocol
 -  Support for MSI or MESI coherence protocols
 -  Support for sequential consistency, processor 
    consistency, and release consistency
 -  Wormhole-routed mesh network
 
RSIM models contention at all resources in the processor, caches, memory
banks, processor-memory bus, and network.
 
Vijay Sadananda Pai 
Thu Aug  7 14:18:56 CDT 1997