Alberto Ros

Biography | Research | Students | Talks | Tools and code | Teaching | Language

I will be also pleased to share the presentations that I gave in the conferences listed in "Research" under request.

Invited talks

• "Boosting Data Centers Performance with the Entangling Instruction Prefetcher". The 6th Workshop on Hot Topics on Data Centers, Beijing, China. December, 2021. [PDF]
• "Entangling Prefetchers". ECEN Computer Engineering Systems Group Seminar, TEXAS A&M UNIVERSITY, Texas, USA. October, 2021. [PDF]
• "Advances in Prefetching Mechanisms and Memory Consistency Speculation". Apple, California, USA. November, 2020.
• "The Future of Computer Architecture". Huawei, Zurich. November, 2020.
• "Entangling Prefetchers". Intel, Oregon, USA. July, 2020.
• "Non-Speculative and Invisible Reordering of Memory Operations". IMDEA Software Institute, Madrid, Spain. March, 2020.
• "Non-Speculative and Invisible Reordering of Memory Operations". DOCS Seminar, Uppsala, Sweden. April, 2019.
• "Non-Speculative Coalescing in Total Store Order". Intel, Oregon, USA. October, 2018.
• "Non-speculative memory reordering with strong consistency". Multicore Day, Stockholm, Sweden. November, 2017. [PDF]
• "Non-speculative load-load reordering in TSO". ICSA Seminar University of Edinburgh, UK. October, 2017. [PDF]
• "Racer: TSO-Consistency Cache Coherence". NUMAScale, Oslo, Norway. November, 2016. [PDF]
• "VIPS: Simple, Efficient, and Scalable Cache Coherence". Research Seminar, Barcelona Supercomputer Center, Spain. December, 2015. [PDF]
• "Private/Shared Classification in Complexity-Effective Coherence Protocols". Nvidia, Santa Clara, CA, USA. October, 2015. [PDF]
• "Efficient and Scalable Cache Coherence for Many-Core Architectures". Uppsala University, Sweden. May, 2011. [PDF]
• "Efficient and Scalable Cache Coherence for Many-Core Architectures". Research Seminar University of Manchester, UK. May, 2011. [PDF]

Invited lectures

• "Cache coherence, memory consistency, and their interaction". UPMARC Multicore Computing Summer School, Uppsala, Sweden. June, 2017. [PDF]
• "Design aspects of Cache Coherence Protocols in Many-Cores". Advanced Seminars, Master in Computer and Network Engineering, Technical University of Valencia, Spain. February, 2016. [PDF]
• "Design aspects of Cache Coherence Protocols in Many-Cores". Advanced Seminars, Master in Computer and Network Engineering, Technical University of Valencia, Spain. February, 2015. [PDF]