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- l1type
- This parameter specifies the L1 cache type. If ``WT'' is
chosen, a write-through cache with no-write-allocate is used. If ``WB''
is chosen, a write-back cache with write-allocate is used. With a write-through
cache, the system will also have a coalescing write-buffer. (In either case, the secondary
cache is write-back with write-allocate. ) The default is ``WT''.
- linesize
- The number given here specifies the cache-line size in bytes. Defaults to 64.
- l1size
- This number specifies the size of the L1 cache in kilobytes. Defaults to 16.
- l1assoc
- This number specifies the set associativity of the L1 cache. The cache uses an LRU-like replacement policy within each set (the policy uses LRU ages, but prefers
to evict lines held in shared state rather than lines held in exclusive state, and unmodified lines
rather than modified lines). Defaults to 1.
- l1ports
- Specifies the number of cache request ports at the
L1 cache. Defaults to 2.
- l1taglatency
- Specifies the cache access latency at the L1 cache (for both tag and data access).
Defaults to 1. (With the assumption of a 300 MHz processor, this
represents a 3 ns on-chip SRAM.)
- l2size
- This number specifies the size of the L2 cache in kilobytes. Defaults to 64.
- l2assoc
- This number specifies the set associativty of the L2 cache. The cache uses an LRU-like replacement policy within each set. Defaults to 4.
- l2taglatency
- Specifies the access latency of the L2 cache tag array.
Defaults to 3.
- l2datalatency
- Specifies the access latency of the L2 cache data array.
Defaults to 5.
- wrbbufextra
- The L2 cache includes a buffer for
sending subset enforcement messages to the L1 cache and write-backs
to memory. Write-backs remain in the buffer only until issuing to the
bus, and subset enforcement messages remain only until issuing to the
level 1 cache. This buffer must contain at least one entry for each L2 MSHR,
since each outbound request may result in a replacement upon reply. The
number specified with wrbbufextra indicates the number of additional
entries to provide for the write-back buffer in order to allow more
outgoing requests while other write-backs still have not issued. Defaults
to 0. (More details about the write-back buffer are given in Chapter 13.)
- ccprot
- The string given here specifies the cache-coherence protocol
of the system; mesi and msi are acceptable values. Defaults to
mesi.
- wbufsize
- If a write-through L1 cache is used, this parameter
specifies the number of cache lines in the coalescing write-buffer. With
a write-back L1 cache, this parameter is ignored. Defaults to 8.
- mshrcoal
- This number specifies the maximum number of requests
that can coalesce into a cache MSHR or a write buffer line. Defaults to 16
(64 is the maximum allowable).
Next: Bus parameters
Up: Configuration file
Previous: Processor parameters
Vijay Sadananda Pai
Thu Aug 7 14:18:56 CDT 1997