The processor memory unit includes nearly as much complexity as the
rest of
the processor, which was discussed in Chapter 10.
The functions provided include adding new memory instructions
to the memory unit, generating addresses, issuing memory instructions
to the memory hierarchy, and
completing memory instructions in the memory hierarchy
. Throughout this entire process, the
memory unit must consider the
ordering constraints described in Section 3.2.3: constraints
for precise exceptions, constraints for uniprocessor data dependences,
and constraints for multprocessor memory consistency models.
The remainder of this section discusses the various tasks of the memory unit in the context of the above requirements. Note that the code for implementing sequential consistency (SC) or processor consistency (PC) is chosen by defining the preprocessor macro STORE_ORDERING, whereas the code for release consistency (RC) is selected by leaving that macro undefined.