Ricardo Fernández Pascual

I am an Associate Professor (Profesor Titular) at the Computer Engineering Department (DITEC) of the Universidad de Murcia. Currently, I teach "Estructura y Tecnología de Computadores" (introductory computer architecture course) to first year students and "Organización y Arquitectura de Computadores" (more advanced computer architecture course) to third year students, and other courses.

Contact information

Campus de Espinardo S/N.
Facultad de Informática 
30100 Murcia (SPAIN)
Phone: +34 868 88 8566

e-mail: rfernandez@ditec.um.es
    

Research

My main research interests include memory hierarchies for chip multiprocessors, and general computer architecture. I am also interested in parallel programming, compilation, virtual machines, fault tolerance and programming language design.

Publications

• Journals:
  • Bernabé, Gregorio, Fernández, Ricardo, García, José M., Acacio, Manuel E., González, José: “An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology”. Parallel Computing. 33, 1 (Feb. 2007), 54–72.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio and José Duato: “Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures”. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 19, no. 8, pages 1044–1056, August 2008.
  • Alberto Ros, Ricardo Fernández-Pascual, Manuel E. Acacio and José M. García: “Two Proposals for the Inclusion of Directory Information in the Last-Level Private Caches of Glueless Shared-Memory Multiprocessors”. Journal of Parallel Distributed Computing (JPDC), vol. 68, no. 11, pages 1413–1424, November 2008.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio José Duato: “Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level”. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 21, no. 8, pages 1117–1131, August 2010.
  • Alberto Ros, Blas Cuesta, Ricardo Fernández-Pascual, Maria E. Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato: “Extending Magny-Cours Cache Coherence”. IEEE Transactions on Computers (TC), vol. 65, no. 1, pages 593–606, May 2012.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, Alberto Ros, José M. García: “DAPSCO: Distance-Aware Partially Shared Cache Organization”. Transactions on Architecture and Code Optimization (TACO), vol. 8, no. 4, pages 1–20, January 2012.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, José M. García, Sandro Bartollini: “Managing Resources Dynamically in Hybrid Photonic-Electronic NoCs”. Concurrence and Computation: Practice and Experience (CPE), vol. 26, no. 15, pages 2530–2550, October 2014.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, José M. García: “ICCI: In-Cache Coherence Information”. IEEE Transactions on Computers (TC), vol. 64, no. 4, pages 995–1014, April 2015.
  • Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “Are Distributed Sharing Codes a Solution to the Scalability Problem of Coherence Directories in Manycores? An Evaluation Study”. The Journal of Supercomputing (SUPE), vol. 72, no. 2, pages 612–638, February 2016.
  • Juan M. Cebrián, Ricardo Fernández-Pascual, Alexandra Jimborean, Manuel E. Acacio, Alberto Ros: “A dedicated private-shared cache design for scalable multiprocessors”. Concurrence and Computation: Practice and Experience (CPE), vol. 29, no. 2, pages 1–13, January 2017.
  • Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “To be silent or not: on the impact of evictions of clean data in cache-coherent multicores”. The Journal of Supercomputing (SUPE), vol 73, no. 10, pages 4428–4443, March, 2017.
  • Rubén Titos-Gil, Antonio Flores, Ricardo Fernández-Pascual, Alberto Ros, Salvador Petit, Julio Sahuquillo, Manuel E. Acacio: “Way Combination for an Adaptive and Scalable Coherence Directory”. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol 30, no. 11, pages 2608–2623, November, 2019.
  • Rubén Titos-Gil, Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “Concurrent Irrevocability in Best-Effort Hardware Transactional Memory”. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol 31, no. 6, pages 1301–1315, June, 2020.
  • Rubén Titos-Gil, Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “PfTouch: Concurrent Page-Fault Handling for Intel Restricted Transactional Memory”. Journal of Parallel Distributed Computing (JPDC), vol 145, pages 111–123, November, 2020.
  • Marina Shimchenko, Rubén Titos-Gil, Ricardo Fernández-Pascual, Manuel E. Acacio, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean: “Analysing software prefetching opportunities in hardware transactional memory”. The Journal of Supercomputing (SUPE), vol 1, no. 78, pages 919–944, January 2022.
  • Rubén Titos-Gil; Ricardo Fernández-Pascual; Alberto Ros; Manuel E. Acacio: “DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional Memory”. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol 33, no. 1, pages 1–13, January 2022.
  • Víctor Nicolás-Conesa; Rubén Titos-Gil; Ricardo Fernández-Pascual; Alberto Ros; Manuel E. Acacio: “On the interactions between ILP and TLP with hardware transactional memory”. Microprocessors and Microsystems (MICPRO), vol 104, 2024.
• Conferences:
  • Ricardo Fernández, José M. García, Gregorio Bernabé, Manuel E. Acacio: “Codificador de vídeo basado en Wavelet 3D usando OpenMP y Pthreads”. Actas de las XV Jornadas de Paralelismo, September 2004.
  • Ricardo Fernández, José M. García, Gregorio Bernabé, Manuel E. Acacio: “Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures”. Proc. of the 13th Euromicro Conference on Parallel, Distributed and Network-based Processing, February 2005.
  • Ricardo Fernández, José M. García: “RSIM x86: A Cost-Effective Performance Simulator”. Proc. of the 19th European Conference on Modelling and Simulation. June 2005.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio: “Validating a Token Coherence Protocol for Scientific Workloads”. 5th Annual Workshop on Duplicating, Deconstructing and Debunking (held in conjunction with ISCA-33). June 2006.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio: “A Fault Tolerant Coherence Protocol for CMP architectures”. Actas de las XVII Jornadas de Paralelismo, September 2006.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio and José Duato: “A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures”. Proc. of the 13th International Symposium on High-Performance Computer Architecture (HPCA-13). February 2007. This paper was also presented at the 4th HiPEAC Industrial Workshop on Compilers and Architectures.
  • Marco Cornero, Roberto Costa, Ricardo Fernández-Pascual, Andrea Ornstein, Erven Rohou: “An Experimental Environment Validating the Suitability of CLI as an Effective Deployment Format for Embedded Systems”. Proc. of the 2008 International Conference on High Performance Embedded Architectures & Compilers (HiPEAC-2008). January 2008.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio, José Duato: “A Fault-Tolerant Directory-Based Cache Coherence Protocol for CMP Architectures”. Proc. of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN-2008). June 2008.
  • Ricardo Fernández-Pascual, José M. García, Manuel E. Acacio and José Duato: “Fault-tolerant cache coherence protocols for CMPs: evaluation and trade-offs”. Proc. of the 15th International Conference on High Performance Computing (HiPC-2008), Bangalore (India), December 2008.
  • Antonio García-Guirado, Ricardo Fernández-Pascual and José M. García: “Virtual-GEMS: An Infrastructure to Simulate Virtual Machines”. Proc. of the 5th International Workshop on Modeling, Benchmarking and Simulation (in conjunction with ISCA-2009). Austin (USA), June 2009.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, and José M. García: “Analyzing Cache Coherence Protocols for Server Consolidation”. Proc. of the 22nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD-2010), Petrópolis (Brazil), October 2010.
  • Alberto Ros, Blas Cuesta, Ricardo Fernández-Pascual, Maria E. Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato: “EMC2: Extending Magny-Cours Coherence for Large-Scale Servers”. Proc. of the 17th International Conference on High Performance Computing (HiPC-2010), pages 1–10, Goa (India), December 2010.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, Alberto Ros, José M. García: “Energy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation”. Proc. of the 40th International Conference on Parallel Processing (ICPP), pages 51–62, Taipei (Taiwan), September 2011.
  • Alberto Ros, Ricardo Fernández-Pascual, Manuel E. Acacio: “Using Heterogeneous Networks to Improve Energy Efficiency in Direct Coherence Protocols for Many-Core CMPs”. Proc. of the 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD-2012), pages 43–50. New York (USA), October 2012.
  • Antonio García-Guirado, Ricardo Fernández-Pascual, José M. García, Sandro Bartollini: “Dynamic Management Policies for Exploiting Hybrid Photonic-Electronic NoCs”. Exploiting Silicon Photonics for energy-efficient heterogeneous parallel architectures (SiPhotonics'2014, in conjunction with HiPEAC conference 2014). Viena (Austria), January 2014.
  • Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “Characterization of a List-Based Directory Cache Coherence Protocol for Manycore CMPs”. Proc. of 4th Workshop on On-chip memory hierarchies and interconnects: organization, management and implementation (OMHI). Oporto (Portugal), August 2014.
  • Juan Manuel Cebrián, Alberto Ros, Ricardo Fernández-Pascual, Manuel E. Acacio: “Early Experiences with Separate Caches for Private and Shared Data”. Proc. of 11th IEEE International Conference on e-Science (e-Science 2015). Munich (Germany), August 2015.
  • Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence”. Proc. of 29th International Conference on Architecture of Computing Systems (ARCS 2016). Nuremberg (Germany), April 2016.
  • Rubén Titos-Gil, Antonio Flores, Ricardo Fernández-Pascual, Alberto Ros, Manuel E. Acacio: “Way-combining directory: an adaptive and scalable low-cost coherence directory”. Proc. of the International Conference on Supercomputing (ICS 2017). Chicago (USA), June 2017.
  • Víctor Nicolás-Conesa, Rubén Titos-Gil, Ricardo Fernández-Pascual, Alberto Ros and Manuel E. Acacio, “Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory”. 2022 30th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2022), 2022, pp. 157–164, doi: 10.1109/PDP55904.2022.00032.

Past PhD students

PhD thesis

Advisors:

• José Manuel García Carrasco.
• Manuel Eugenio Acacio Sánchez.

Comitee members:

• José Duato Marín, Universidad Politécnica de Valencia (president).
• Juan Luis Aragón Alcaraz, Universidad de Murcia (secretary).
• Angelos Bilas, FORTH and University of Crete.
• Antonio González Colás, Intel Barcelona Research Center and Universitat Politècnica de Catalunya.
• Emre Özer, ARM.